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authorDavid Robillard <d@drobilla.net>2019-11-10 13:32:25 +0100
committerDavid Robillard <d@drobilla.net>2019-11-10 13:32:25 +0100
commit187ba85fef4320c332c55affe5c5cb336f42e5f2 (patch)
tree03bc34721f72baf63370933af79dcd03b95a7361
parent6c5e9239ddea044bf3a3122f0664f1aec7bab668 (diff)
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Fix passing NaN to control ports with no default value
-rw-r--r--src/server/LV2Block.cpp13
1 files changed, 10 insertions, 3 deletions
diff --git a/src/server/LV2Block.cpp b/src/server/LV2Block.cpp
index 1e6706dc..aa9339d1 100644
--- a/src/server/LV2Block.cpp
+++ b/src/server/LV2Block.cpp
@@ -268,7 +268,6 @@ LV2Block::instantiate(BufferFactory& bufs, const LilvState* state)
if (port_type == PortType::UNKNOWN) {
port_type = PortType::CONTROL;
buffer_type = uris.atom_Sequence;
- val = forge.make(def_values[j]);
}
} else if (lilv_port_is_a(plug, id, uris.lv2_CVPort)) {
port_type = PortType::CV;
@@ -362,8 +361,16 @@ LV2Block::instantiate(BufferFactory& bufs, const LilvState* state)
}
if (!val.type() && (port_type != PortType::ATOM)) {
- // Ensure numeric ports have a value, use 0 by default
- val = forge.make(std::isnan(def_values[j]) ? 0.0f : def_values[j]);
+ // Ensure numeric ports have a value
+ if (!std::isnan(def_values[j])) {
+ val = forge.make(def_values[j]);
+ } else if (!std::isnan(min_values[j])) {
+ val = forge.make(min_values[j]);
+ } else if (!std::isnan(max_values[j])) {
+ val = forge.make(max_values[j]);
+ } else {
+ val = forge.make(0.0f);
+ }
}
PortImpl* port = (direction == INPUT)