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author | David Robillard <d@drobilla.net> | 2023-10-06 18:48:59 -0400 |
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committer | David Robillard <d@drobilla.net> | 2023-10-06 18:48:59 -0400 |
commit | 5bc74ae492f27bad7109e54c195f2e463af587cc (patch) | |
tree | 4b1ea27ec080b1fcddab31ffd9c1aa1613586988 /scripts/serd_bench.py | |
parent | 1d2f4ef5a8b05698e33ce8dd87d01c091d38c7b2 (diff) | |
download | serd-5bc74ae492f27bad7109e54c195f2e463af587cc.tar.gz serd-5bc74ae492f27bad7109e54c195f2e463af587cc.tar.bz2 serd-5bc74ae492f27bad7109e54c195f2e463af587cc.zip |
Tolerate reduce floating point precision on Apple Silicon
This is... strange, and slightly worrying, although it's already known that
this conversion code isn't exact in all cases. The next major version will fix
that (and I've confirmed that these issues aren't present there), but that's a
major change so, for now, just reduce the very large number in the test case
slightly so that it passes on these chips as well.
Diffstat (limited to 'scripts/serd_bench.py')
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