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authorDavid Robillard <d@drobilla.net>2016-12-13 17:51:55 -0500
committerDavid Robillard <d@drobilla.net>2016-12-13 19:15:29 -0500
commitad43d2e08cea225635b56c5473a768bc853ecda3 (patch)
tree472a8c6dc605ba63903206a14549e8340efcf137 /src/server/events/CreatePort.cpp
parent0752556bde5659a933744658cdf63509000a5080 (diff)
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Remove virtual inheritance from Port hierarchy
This was confusing stoat, and is questionable design anyway. The OutputPort functionality has been moved to PortImpl, which is a basic port with buffers suitable for use as an output, and is overridden by InputPort and DuplexPort where necessary.
Diffstat (limited to 'src/server/events/CreatePort.cpp')
-rw-r--r--src/server/events/CreatePort.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/server/events/CreatePort.cpp b/src/server/events/CreatePort.cpp
index 60e57a71..bb8bb4d4 100644
--- a/src/server/events/CreatePort.cpp
+++ b/src/server/events/CreatePort.cpp
@@ -141,7 +141,8 @@ CreatePort::pre_process(PreProcessContext& ctx)
polyphonic,
_port_type, _buf_type, buf_size,
value, _flow == Flow::OUTPUT);
-
+ assert((_flow == Flow::OUTPUT && _graph_port->is_output()) ||
+ (_flow == Flow::INPUT && _graph_port->is_input()));
_graph_port->properties().insert(_properties.begin(), _properties.end());
_engine.store()->add(_graph_port);