diff options
| -rw-r--r-- | src/server/GraphImpl.cpp | 8 | ||||
| -rw-r--r-- | src/server/InputPort.cpp | 7 | ||||
| -rw-r--r-- | src/server/JackDriver.cpp | 1 | ||||
| -rw-r--r-- | src/server/PortImpl.cpp | 26 | ||||
| -rw-r--r-- | src/server/PortImpl.hpp | 18 |
5 files changed, 42 insertions, 18 deletions
diff --git a/src/server/GraphImpl.cpp b/src/server/GraphImpl.cpp index ceb94748..256d607a 100644 --- a/src/server/GraphImpl.cpp +++ b/src/server/GraphImpl.cpp @@ -211,9 +211,11 @@ GraphImpl::pre_process(ProcessContext& context) // Mix down input ports and connect buffers for (uint32_t i = 0; i < num_ports(); ++i) { PortImpl* const port = _ports->at(i); - port->pre_process(context); - port->pre_run(context); - port->connect_buffers(); + if (!port->is_driver_port()) { + port->pre_process(context); + port->pre_run(context); + port->connect_buffers(); + } } } diff --git a/src/server/InputPort.cpp b/src/server/InputPort.cpp index f2aacea1..abaf5b62 100644 --- a/src/server/InputPort.cpp +++ b/src/server/InputPort.cpp @@ -148,14 +148,13 @@ InputPort::pre_process(Context& context) for (uint32_t v = 0; v < _poly; ++v) { buffer(v)->update_value_buffer(context.offset()); } - return; - } - - if (_arcs.empty()) { + } else if (_arcs.empty()) { + // No incoming arcs, just update set state for (uint32_t v = 0; v < _poly; ++v) { update_set_state(context, v); } } else if (direct_connect()) { + // Directly connected, use source's buffer directly for (uint32_t v = 0; v < _poly; ++v) { _voices->at(v).buffer = _arcs.front().buffer(v); } diff --git a/src/server/JackDriver.cpp b/src/server/JackDriver.cpp index b4e3add3..94658cc3 100644 --- a/src/server/JackDriver.cpp +++ b/src/server/JackDriver.cpp @@ -312,6 +312,7 @@ JackDriver::create_port(DuplexPort* graph_port) graph_port->setup_buffers(*_engine.buffer_factory(), graph_port->poly(), false); + graph_port->set_is_driver_port(true); return eport; } else { return NULL; diff --git a/src/server/PortImpl.cpp b/src/server/PortImpl.cpp index ea71568c..7119f94c 100644 --- a/src/server/PortImpl.cpp +++ b/src/server/PortImpl.cpp @@ -75,6 +75,7 @@ PortImpl::PortImpl(BufferFactory& bufs, , _is_logarithmic(false) , _is_sample_rate(false) , _is_toggled(false) + , _is_driver_port(false) { assert(block != NULL); assert(_poly > 0); @@ -262,32 +263,37 @@ PortImpl::set_voice_value(const Context& context, } void -PortImpl::update_set_state(Context& context, uint32_t voice) +PortImpl::update_set_state(Context& context, uint32_t v) { - SetState& state = _voices->at(voice).set_state; + Voice& voice = _voices->at(v); + SetState& state = voice.set_state; + BufferRef buf = voice.buffer; switch (state.state) { case SetState::State::SET: + break; + case SetState::State::SET_CYCLE_1: if (state.time < context.start() && - buffer(voice)->is_sequence() && - buffer(voice)->value_type() == _bufs.uris().atom_Float && + buf->is_sequence() && + buf->value_type() == _bufs.uris().atom_Float && !_parent->path().is_root()) { - buffer(voice)->clear(); + buf->clear(); state.time = context.start(); } + state.state = SetState::State::SET; break; case SetState::State::HALF_SET_CYCLE_1: state.state = SetState::State::HALF_SET_CYCLE_2; break; case SetState::State::HALF_SET_CYCLE_2: - if (buffer(voice)->is_sequence()) { - buffer(voice)->clear(); - buffer(voice)->append_event( + if (buf->is_sequence()) { + buf->clear(); + buf->append_event( 0, sizeof(float), _bufs.uris().atom_Float, (const uint8_t*)&state.value); } else { - buffer(voice)->set_block(state.value, 0, context.nframes()); + buf->set_block(state.value, 0, context.nframes()); } - state.state = SetState::State::SET; + state.state = SetState::State::SET_CYCLE_1; break; } } diff --git a/src/server/PortImpl.hpp b/src/server/PortImpl.hpp index 98a9d81e..3eb33e6d 100644 --- a/src/server/PortImpl.hpp +++ b/src/server/PortImpl.hpp @@ -44,7 +44,19 @@ class PortImpl : public NodeImpl { public: struct SetState { - enum class State { SET, HALF_SET_CYCLE_1, HALF_SET_CYCLE_2 }; + enum class State { + /// Partially set, first cycle: AAAAA => AAABB. + HALF_SET_CYCLE_1, + + /// Partially set, second cycle: AAABB => BBBBB. + HALF_SET_CYCLE_2, + + /// Fully set, first cycle (clear events if necessary). + SET_CYCLE_1, + + /// Fully set, second cycle and onwards (done). + SET + }; SetState() : state(State::SET), value(0), time(0) {} @@ -128,6 +140,9 @@ public: FrameTime time, Sample value); + void set_is_driver_port(bool b) { _is_driver_port = b; } + bool is_driver_port() const { return _is_driver_port; } + /** Called once per process cycle */ virtual void pre_process(Context& context) = 0; virtual void pre_run(Context& context) {} @@ -264,6 +279,7 @@ protected: bool _is_logarithmic; bool _is_sample_rate; bool _is_toggled; + bool _is_driver_port; }; } // namespace Server |