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2022-10-14Simplify clang-tidy configurationDavid Robillard4-26/+4
2022-10-14Only build semaphore code if threads are availableDavid Robillard1-1/+6
2022-10-14Clean up platform configuration checksDavid Robillard1-26/+22
2022-10-14Fix fallback configuration on older MacOS versionsDavid Robillard1-1/+1
2022-10-14Fix zix_sem_timed_wait() interval calculationDavid Robillard2-1/+10
2022-10-09Add Fedora row to CIDavid Robillard1-0/+9
2022-10-09Fix off-by-one error in assertionDavid Robillard1-1/+1
2022-10-07Override pkg-config dependency within mesonDavid Robillard1-0/+3
2022-09-08Only run autoship and reuse tests in strict modeDavid Robillard2-16/+22
2022-09-02Improve test coverageDavid Robillard3-5/+7
2022-09-02Improve zix_ring_mlock() return statusDavid Robillard1-11/+16
2022-09-02Factor out POSIX-style return patternDavid Robillard3-7/+17
2022-09-01Make glib a system dependencyDavid Robillard1-1/+2
This avoids warnings from some compilers, and clang-tidy.
2022-09-01Remove redundant thread dependencyDavid Robillard1-1/+0
2022-09-01Simplify thread and semaphore status codesDavid Robillard7-11/+18
2022-08-22Make COPYING a regular text file and link to it in LICENSESDavid Robillard2-14/+14
This just happens to be the way that both `licensee` (and therefore Github) and `reuse` handle correctly.
2022-08-22Use standard ISC license textDavid Robillard1-7/+7
I'm not sure where the disclaimer variant that starts with "THIS" came from (although it is better that way), but this one that starts with "THE" is the standard text which is recognized by tools like `licensee` (and therefore Github) as a perfect match. There are no other changes other than whitespace.
2022-08-19Avoid unused parameter warningDavid Robillard1-0/+1
2022-08-19Avoid mixing signed and unsigned integersDavid Robillard6-9/+9
2022-08-19Simplify errno handlingDavid Robillard4-23/+21
2022-08-19Move sem implementation out of headerDavid Robillard7-186/+284
This avoids having platform conditionals in public headers, which causes build problems for dependants.
2022-08-18Add return status to zix_ring_mlock()David Robillard2-5/+6
2022-08-18Relax test timingDavid Robillard1-1/+1
2022-08-18Fix conversion warning on 32-bit ARMDavid Robillard1-2/+2
2022-08-18Add zix_sem_timed_wait()David Robillard3-2/+81
2022-08-18Fix semaphore error handlingDavid Robillard7-43/+96
Note that existing code which uses zix_sem_try_wait() may still compile against this change, but be incorrect!
2022-08-18Fix thread function attributes on WindowsDavid Robillard4-13/+7
2022-08-18Reduce tree test complexityDavid Robillard1-104/+77
2022-08-18Improve test coverageDavid Robillard3-10/+99
2022-08-18Fix or remove non-portable features in thread APIDavid Robillard6-30/+98
Thread function return values are inconsistent between nearly every threading API out there. So, just ignore them entirely, and provide a typedef and sentinel value so user code can be portable.
2022-08-18Factor out converting errno codes to ZixStatusDavid Robillard5-14/+69
2022-08-18Reduce zix_tree_insert() complexityDavid Robillard1-12/+6
2022-08-18Reduce variable scope and mutabilityDavid Robillard1-7/+6
2022-08-18Remove debug printing from treeDavid Robillard2-62/+6
2022-08-18Handle trees with no destroy callback more gracefullyDavid Robillard1-10/+11
2022-08-18Use conventional test executable namesDavid Robillard10-10/+14
2022-08-18Fix test coverage on CIDavid Robillard1-0/+1
2022-08-18Replace duplicated license with a symbolic linkDavid Robillard2-14/+2
2022-08-18Add release metadata testDavid Robillard2-1/+12
2022-08-18Add NEWS fileDavid Robillard1-0/+5
2022-08-18Sort meson option definitionsDavid Robillard1-3/+3
2022-08-18Clean up Python scriptsDavid Robillard4-74/+108
2022-08-18Make all ring parameters constDavid Robillard1-18/+22
2022-08-18Add transactional ring APIDavid Robillard3-6/+113
2022-08-12Run TSan and MSan on CIDavid Robillard1-3/+6
2022-08-12Fix ring thread safetyDavid Robillard1-25/+53
The previous code was "probably fine" in practice, but was both missing some necessary synchronization, and using unnecessarily heavyweight barriers on Windows. Since this code conveniently has a 1:1 relationship between barriers and atomic accesses anyway, rewrite things to use an "atomic" interface closer to standard C11 and C++11. Harden things in the process, so that the thread-safety guarantees are followed, and hopefully clearer to see in the code (1 synchronized read of "their" index, then maybe 1 synchronized write of "your" index). Windows/MSVC annoyingly does not provide a suitable C API for this, so just ignore the existence of Windows on ARM and use x86/x64 Windows intrinsics to prevent compiler reordering (which is all that's required on those architectures). Note that MSVC can make some reordering guarantees about volatile variables, but: * Only with a certain option, /volatile:ms, which Microsoft "strongly recommend" against using. It is disabled by default (and painfully slow if enabled) on ARM. * This guarantee does not prevent reordering of access to other memory (only the volatile variables themselves), which is required by a ring buffer. So, deal with that case by using explicit read and write barriers like before, but only in the atomic abstractions. In the process, switch to more lightweight barriers, which should marginally improve performance on Windows. When MSVC adds stdatomic.h support, most of the platform-specific gunk here can go away entirely.
2022-08-12Simplify ring writing codeDavid Robillard1-6/+8
The compiler is surely smart enough to factor out these common expressions, but I find this easier to read this way anyway.
2022-08-12Use a consistent error handling styleDavid Robillard1-6/+5
2022-08-12Simplify ring space calculationsDavid Robillard1-14/+2
It isn't necessary to branch here to avoid underflow. Essentially, the way that unsigned binary integers work "automatically" does what this code was doing. Note that these expressions only work for a ring buffer that, like this one, has a power of 2 (real) size and a maximum capacity 1 less than that.
2022-08-12Document the thread semantics of every ring functionDavid Robillard1-15/+42
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